Apr, 2025 : AMD Reaches First Silicon Milestone on TSMC's 2nm Process


AMD Reaches First Silicon Milestone on TSMC's 2nm Process

📅 - AMD has achieved a major milestone in semiconductor innovation by taping out its next-generation AMD EPYC CPU, codenamed Venice, on TSMCs cutting-edge 2nm (N2) process technology. This would mark the first HPC product in the industry to be taped out and brought up on the TSMC advanced 2nm (N2) process technology, highlighting the deep collaboration between the two companies and reinforcing AMDs leadership in data center innovation.

Venice would represent a critical advancement in AMDs CPU roadmap, with a full launch expected in 2025. The announcement signals AMDs continued focus on delivering energy-efficient, high-performance computing solutions for hyperscalers and enterprise data [...][... Check source for end of article ...]
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